• DocumentCode
    1084952
  • Title

    Block placement with a Boltzmann Machine

  • Author

    De Gloria, A. ; Faraboschi, P. ; Olivieri, M.

  • Author_Institution
    Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy
  • Volume
    13
  • Issue
    6
  • fYear
    1994
  • fDate
    6/1/1994 12:00:00 AM
  • Firstpage
    694
  • Lastpage
    701
  • Abstract
    The Boltzmann Machine is a neural model based on the same principles of simulated annealing that reaches good solutions, reduces the computational requirements, and is well suited for a low-cost, massively parallel hardware implementation. In this paper we present a connectionist approach to the problem of block placement in the plane to minimize wire length, based on its formalization in terms of the Boltzmann Machine. We detail the procedure to build the Boltzmann Machine by formulating the placement problem as a constrained quadratic assignment problem and by defining an equivalent 0-1 programming problem. The key features of the proposed model are: (1) high degree of parallelism in the algorithm, (2) high quality of the results, often near-optimal, and (3) support of a large variety of constraints such as arbitrary block shape, flexible aspect ratio, and rotations/reflections. Experimental results on different problem instances show the skills of the method as an effective alternative to other deterministic and statistical techniques
  • Keywords
    Boltzmann machines; circuit layout CAD; mathematical programming; parallel algorithms; simulated annealing; Boltzmann Machine; arbitrary block shape; aspect ratio; connectionist approach; constrained quadratic assignment problem; equivalent 0-1 programming problem; massively parallel hardware implementation; neural model; reflections; rotations; simulated annealing; wire length minimisation; Computational modeling; Concurrent computing; Genetic algorithms; Hardware; Helium; Iterative algorithms; Parallel processing; Shape; Simulated annealing; Wire;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.285242
  • Filename
    285242