DocumentCode :
1085048
Title :
Minimizing production test time to detect faults in analog circuits
Author :
Milor, Linda ; Sangiovanni-Vincentelli, Alberto L.
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Volume :
13
Issue :
6
fYear :
1994
fDate :
6/1/1994 12:00:00 AM
Firstpage :
796
Lastpage :
813
Abstract :
Analog testing is a difficult task without a clearcut methodology. Analog circuits are tested for satisfying their specifications, not for faults. Given the high cost of testing analog specifications, it is proposed that tests for analog circuits should be designed to detect faults. Therefore analog fault modeling is discussed. Based on an analysis of the types of tests needed for different types of faults, algorithms for fault-driven test set selection are presented. A major reduction in testing time should come from reducing the number of specification tests that need to be performed. Hence algorithms are presented for minimizing specification testing time. After specification testing time is minimized, the resulting test sets are supplemented with some simple, possibly non-specification, tests to achieve 100% fault coverage. Examples indicate that fault-driven test set development can lead to drastic reductions in production testing time
Keywords :
analogue circuits; automatic testing; circuit analysis computing; fault location; integrated circuit testing; linear integrated circuits; production testing; 100% fault coverage; IC testing; analog circuits; analog fault modeling; fault detection; fault-driven test set selection; production test time; specification testing time; Analog circuits; Circuit faults; Circuit testing; Costs; Electrical fault detection; Fabrication; Fault detection; Manufacturing; Performance evaluation; Production;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/43.285252
Filename :
285252
Link To Document :
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