Title :
Area-efficient self-calibration technique for pipe-lined algorithmic A/D converters
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
fDate :
7/1/1996 12:00:00 AM
Abstract :
An area-efficient self-calibration technique for pipe-lined A/D converters is presented. It consists of trimming the reference voltage to each stage by means of a tunable MOSFET attenuator. This simplifies the calibration circuit in each stage and shifts most of the calibration task to a hardware that is shared by all stages
Keywords :
analogue-digital conversion; calibration; pipeline processing; area-efficient self-calibration; pipe-lined algorithmic A/D converter; reference voltage trimming; tunable MOSFET attenuator; Arithmetic; Attenuators; Calibration; Capacitors; Circuits; Clocks; Finite impulse response filter; Signal processing algorithms; Switches; Voltage;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
