Title :
A 33-mW 8-Gb/s CMOS clock multiplier and CDR for highly integrated I/Os
Author :
Farjad-Rad, Ramin ; Nguyen, Anhtuyet ; Tran, James M. ; Greer, Trey ; Poulton, John ; Dally, William J. ; Edmondson, John H. ; Senthinathan, Ramesh ; Rathi, Rohit ; Lee, M. J Edward ; Ng, Hiok-Tiaq
Author_Institution :
Velio Commun. Inc., Milpitas, CA, USA
Abstract :
A 0.622-8-Gb/s clock and data recovery (CDR) circuit using injection locking for jitter suppression and phase interpolation in high-bandwidth system-on-chip solutions is described. A slave injection locked oscillator (SILO) is locked to a tracking aperture-multiplying DLL (TA-MDLL) via a coarse phase selection multiplexer (MUX). For the fine timing vernier, an interpolator DAC controls the injection strength of the MUX output into the SILO. This 1.2-V 0.13-μm CMOS CDR consumes 33 mW at 8Gb/s. Die area including voltage regulator is 0.08 mm2. Recovered clock jitter is 49 ps pk-pk at a 200-ppm bit-rate offset.
Keywords :
CMOS digital integrated circuits; clocks; digital phase locked loops; frequency multipliers; jitter; multiplexing; multiplying circuits; oscillators; system-on-chip; 0.13 micron; 1.2 V; 33 mW; 8 Gbit/s; CDR circuit; CMOS CDR; CMOS clock multiplier; clock jitter; clock multiplication; clock-and-data recovery; coarse phase selection multiplexer; frequency acquisition; frequency tracking; high-bandwidth system-on-chip; high-speed transceivers; highly integrated I/O; injection locking; jitter filtering; jitter suppression; multiplying DLL; phase interpolation; slave injection locked oscillator; tracking aperture-multiplying DLL; voltage regulator; Circuits; Clocks; Injection-locked oscillators; Interpolation; Jitter; Multiplexing; Regulators; System-on-a-chip; Timing; Voltage; CDR; Clock and data recovery; clock multiplication; frequency tracking/acquisition; high-speed transceivers; injection locking; jitter filtering; multiplying DLL; phase interpolation;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.831457
