Optimum analog preprocessing for folding ADCs

Folding analog-to-digital converters (ADCs) that use symmetrical number system (SNS) preprocessing, require fewer comparators than those that use conventional binary encoding. This paper considers an alternate SWS definition that considerably extends the dynamic range of the SNS ADC. The efficiency of this definition is compared to previous definitions and is shown to be optimum. As an example, a unipolar 7-b SNS ADC using pairwise relatively prime moduli m₁=4, m₂ =5 and m₃=7 is evaluated numerically. Transfer functions are shown which detail encoding errors that occur when the folded input samples lie at one of the code transition points. To discard the encoding errors that occur, a decimation band is constructed at each transition point. The effectiveness of the decimation band in eliminating the encoding errors is also quantified