DocumentCode
1085287
Title
A single chip Δ-Σ ADC with a built-in variable gain stage and DAC with a charge integrating subconverter for a 5 V 9600-b/s modem
Author
Kim, Daejeong ; Park, Jaejin ; Kim, Sungjoon ; Jeong, Deog-Kyoon ; Kim, Wonchan
Author_Institution
LG Semicon Co. Ltd., Seoul, South Korea
Volume
30
Issue
8
fYear
1995
fDate
8/1/1995 12:00:00 AM
Firstpage
940
Lastpage
943
Abstract
A 12-b, 19.2-ksamples/s Δ-Σ A/D and D/A converter for a 9600-b/s facsimile modem analog front end is described. In the proposed Δ-Σ ADC, the reference voltage is varied to adjust the signal gain, thus, eliminating the need of a variable gain amplifier. The Δ-Σ DAC uses a 4-b charge integrating subconverter which is insensitive to process variations
Keywords
digital-analogue conversion; facsimile; facsimile equipment; integrating circuits; modems; quadrature amplitude modulation; sigma-delta modulation; Δ-Σ ADC; 12 bit; 5 V; 9600 bit/s; DAC; analog front end; built-in variable gain stage; charge integrating subconverter; facsimile modem; process variations; reference voltage; signal gain; Attenuation; Bandwidth; Digital modulation; Digital signal processing; Equivalent circuits; Facsimile; Frequency; Gain; Gain control; Modems; Sampling methods; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.408364
Filename
408364
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