Design and implementation of a microprogrammed Lisp machine

The article presents the architectural design and implementation of a Lisp machine Lisp M1 developed at Xian Jiaotong University in China. Approaches adopted by Lisp M1 to support the execution of Lisp programs are discussed. Techniques used to implement the machine are presented. A speed comparison between Lisp M1 and some conventional computers and special purpose Lisp machines is also given. The Lisp M1 system consists of a list processor LP and a list memory LM, and is connected to an input/output processor IOP which is currently an IBM PC. LM is a two-port memory connecting IOP and LP. From the performance of Lisp M1 the authors are convinced that using special hardwares, such as hardware stacks and tag processing elements, is an effective way to speed up the execution of Lisp programs. Using microprograms to interpret Lisp language not only narrows the semantical gap between the machine language and Lisp, but also facilitates the implementation and continuous improvement aspects. The list memory with binary tree mapping and prefetching is a unique feature of Lisp M1 and is absent in other Lisp machines. It significantly reduces the memory access latency and enhances the system performance