Title :
Modeling the I-V characteristics of fully depleted submicrometer SOI MOSFET´s
Author :
Hsiao, T.C. ; Kistler, N.A. ; Woo, J.C.S.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Abstract :
An analytic current-voltage model for submicrometer fully-depleted (FD) silicon-on-insulator (SOI) MOSFET´s is presented. This model takes into account the source/drain series resistances which can be especially high in thin film SOI devices. The effect of drain induced conductivity enhancement is also included, which is important for submicrometer channels. The model is verified by comparison to measured SOI I-V characteristics. Good agreement is obtained for SOI film thicknesses ranging from 40 to 220 nm and effective channel lengths down to 0.25 μm.
Keywords :
elemental semiconductors; insulated gate field effect transistors; semiconductor device models; semiconductor-insulator boundaries; silicon; 0.25 micron; 220 nm; 40 nm; I-V characteristics; Si; analytic current-voltage model; drain induced conductivity enhancement; fully depleted type; source/drain series resistances; submicrometer channels; submicron SOI MOSFET; thin film SOI devices; Capacitance; Conductivity; Electrical resistance measurement; Intrusion detection; MOSFET circuits; Semiconductor device modeling; Silicon on insulator technology; Thin film devices; Threshold voltage; Transistors;
Journal_Title :
Electron Device Letters, IEEE
