DocumentCode :
1086073
Title :
Effects of nonlinear storage capacitor on DRAM READ/WRITE
Author :
Jiang, Bo ; Sudhama, C. ; Khamankar, Rajesh ; Kim, Jiyoung ; Lee, Jack C.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Volume :
15
Issue :
4
fYear :
1994
fDate :
4/1/1994 12:00:00 AM
Firstpage :
126
Lastpage :
128
Abstract :
Important aspects of nonlinear storage capacitor switching and their impact on DRAM READ/WRITE operations are explained using a simple model and PSpice simulation. The voltage signal and charge-transfer rate are found to be dependent not only on the total charged stored, but also on the exact shape of the storage capacitor Q-V curve. Typical paraelectric capacitors are shown to deliver a smaller voltage signal than a linear capacitor that has the same stored charge at the operating voltage. Further, typical paraelectric capacitors have slower READ but faster WRITE compared to the linear capacitor.<>
Keywords :
DRAM chips; MOS integrated circuits; SPICE; VLSI; circuit CAD; digital simulation; DRAM READ/WRITE; MOSFET cells; PSpice simulation; Q-V curve; charge-transfer rate; nonlinear storage capacitor; paraelectric capacitors; storage capacitor switching; voltage signal; Capacitors; Dielectrics; Large scale integration; Lifting equipment; MOSFET circuits; Operational amplifiers; Permittivity; Random access memory; Shape; Voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.285408
Filename :
285408
Link To Document :
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