DocumentCode
1086101
Title
Memory-efficient sum-product decoding of LDPC codes
Author
Sankar, Hari ; Narayanan, Krishna R.
Author_Institution
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Volume
52
Issue
8
fYear
2004
Firstpage
1225
Lastpage
1230
Abstract
Low-density parity-check (LDPC) codes perform very close to capacity for long lengths on several channels. However, the amount of memory (fixed-point numbers that need to be stored) required for implementing the message-passing algorithm increases linearly as the number of edges in the graph increases. In this letter, we propose a decoding algorithm for decoding LDPC codes that reduces the memory requirement at the decoder. The proposed decoding algorithm can be analyzed using density evolution; further, we show how to design good LDPC codes using this. Results show that this algorithm provides almost the same performance as the conventional sum-product decoding of LDPC codes.
Keywords
AWGN channels; Gaussian distribution; decoding; error statistics; parity check codes; Gaussian approximation; decoding algorithm; density evolution; low-density parity-check codes; memory-efficient sum-product decoding; message-passing algorithm; sum-product algorithm; AWGN; Additive white noise; Algorithm design and analysis; Approximation algorithms; Bipartite graph; Bit error rate; Gaussian approximation; Iterative decoding; Parity check codes; Turbo codes; Density evolution; Gaussian approximation; LDPC; codes; low-density parity-check; memories; sum–product algorithm; threshold; turbo-codes;
fLanguage
English
Journal_Title
Communications, IEEE Transactions on
Publisher
ieee
ISSN
0090-6778
Type
jour
DOI
10.1109/TCOMM.2004.833016
Filename
1327834
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