Title :
Low-power multimedia RISC
Author :
Nadehara, Kouhei ; Kuroda, Ichiro ; Daito, Masayuki ; Nakayama, Takashi
Author_Institution :
C&C Inf. Technol. Res. Labs., NEC Corp., Kawasaki, Japan
fDate :
12/1/1995 12:00:00 AM
Abstract :
Battery-powered multimedia systems challenge designers to pack enormous signal-processing power into a low-power chip. The V830 chip achieves this by combining a special instruction set and fast, 32-bit parallel multiply-adder with internal RAM for quicker memory accesses. This gives the newest entry in the V800 series signal-processing capabilities as fast as the latest fixed-point DSPs
Keywords :
microprocessor chips; multimedia computing; reduced instruction set computing; 32-bit parallel multiply-adder; V800 series; V830 chip; low-power chip; memory accesses; multimedia RISC; multimedia systems; Clocks; Costs; High level languages; Microprocessors; Multimedia systems; Pipelines; Productivity; Reduced instruction set computing; Signal design; Signal processing;
Journal_Title :
Micro, IEEE
