DocumentCode :
1087291
Title :
Selective low-pressure silicon epitaxy for MOS and bipolar transistor application
Author :
Kürten, Hans ; Voss, Heinz-Jürgen ; Kim, Wonchan ; Engl, Walter L.
Author_Institution :
Technische Hochschule Aachen, Aachen, Germany
Volume :
30
Issue :
11
fYear :
1983
fDate :
11/1/1983 12:00:00 AM
Firstpage :
1511
Lastpage :
1515
Abstract :
The selective low-pressure epitaxy is presented in this paper. In contrast to LOCOS technology, this process starts with structuring a thick field oxide by anisotropic RIE etching. Then monocrystalline silicon is grown selectively in the windows formed. Si-gate MOS transistors have been produced using this technology. In the field of bipolar transistors, reactive ion etching and selective low-pressure epitaxy has been used to optimize the Schottky collector transistor to a nearly one-dimensional structure. These transistors have been built on a submicrometer epitaxial layer.
Keywords :
Anisotropic magnetoresistance; Bipolar transistors; Epitaxial growth; Etching; Isolation technology; MOSFETs; Oxidation; Resists; Silicon; Very large scale integration;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1983.21330
Filename :
1483231
Link To Document :
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