Title :
IIB-5 practical limitations of gate-oxide thickness minimization in the MOSFET
Author :
Yu-Pin Han ; Mize, J.P. ; Pinto, Joel ; Worley, Rick
fDate :
11/1/1983 12:00:00 AM
Keywords :
CMOS technology; Constraint theory; Degradation; Low voltage; MOSFET circuits; Nonvolatile memory; Pulsed power supplies; Random access memory; SONOS devices; Silicon;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1983.21353
