Title :
High-speed low-power ECL circuit with AC-coupled self-biased dynamic current source and active-pull-down emitter-follower stage
Author :
Chuang, C.T. ; Chin, K. ; Shin, H.J. ; Lu, P.F.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
8/1/1992 12:00:00 AM
Abstract :
The design of an ECL circuit with AC-coupled self-biased dynamic current source and active-pull-down emitter-follower stage for low-power high-speed gate array applications is presented. The circuit features an AC-coupled dynamic current source to improve the power-delay of the logic stage (current switch). A self-biasing scheme for the dynamic current source and the active-pull-down transistor with no additional devices and power in the biasing circuit is described. Based on a 0.8-μm double-poly, self-aligned bipolar technology at a power consumption of 1.0 mW/gate, the circuit offers 1.62× (1.90×) improvement in the speed (load driving capability) of a loaded gate compared with the conventional ECL circuit
Keywords :
bipolar integrated circuits; emitter-coupled logic; logic arrays; 0.8 micron; 1 mW; AC-coupled; Si; active-pull-down; double polysilicon technology; dynamic current source; emitter-follower stage; high-speed gate array; low-power ECL circuit; power-delay; self-aligned bipolar technology; self-biasing scheme; Delay; Energy consumption; Helium; Logic circuits; Logic devices; Power dissipation; Resistors; Switches; Switching circuits; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
