DocumentCode :
1088333
Title :
Hardware Atomicity: An Effective Abstraction for Reliable Software Speculation
Author :
Neelakantam, Naveen ; Rajwar, Ravi ; Srinivas, Suresh ; Srinivasan, Uma ; Zilles, Craig
Author_Institution :
Univ. of Illinois at Urbana-Champaign, Champaign
Volume :
28
Issue :
1
fYear :
2008
Firstpage :
21
Lastpage :
31
Abstract :
Technology trends and shrinking power envelopes have forced microprocessor designers to focus on hardware techniques that efficiently improve single-thread performance without superlinear increases in power and silicon area. In this article, we identify hardware atomic execution - the execution of a region of code completely or not at all - as such a feature for simplifying existing and enabling new speculative compiler optimizations. Specifically, we propose that microprocessors expose atomic execution as a hardware primitive to the compiler. Doing so lets the compiler generate a speculative version of the code where infrequently executed code paths are removed.
Keywords :
hardware-software codesign; microprocessor chips; multi-threading; optimising compilers; software reliability; hardware atomic execution; microprocessor design; multithreaded applications; reliable software speculation; single-thread performance; speculative compiler optimizations; Application software; Constraint optimization; Energy consumption; Hardware; Java; Microprocessors; Optimizing compilers; Silicon; Software performance; Virtual machining; Java; architecture; atomicity; checkpoint; compiler; compiler-architecture interactions; isolation; optimization; speculation;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2008.7
Filename :
4460509
Link To Document :
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