Title :
Architecting Efficient Interconnects for Large Caches with CACTI 6.0
Author :
Muralimanohar, Naveen ; Balasubramonian, Rajeev ; Jouppi, Norman P.
Author_Institution :
Univ. of Utah, Salt Lake City
Abstract :
Interconnects play an increasingly important role in determining the power and performance characteristics of modern processors. an enhanced version of the popular CACTI tool primarily focuses on interconnect design for large scalable caches. the new version can help evaluate novel interconnection networks for cache access and accurately estimate the delay, power, and area of large caches with uniform and nonuniform access times.
Keywords :
multiprocessor interconnection networks; CACTI 6.0; cache access; interconnect design; interconnection networks; large scalable caches; Delay estimation; Fabrics; Intelligent networks; Microprocessors; Multicore processing; Multiprocessor interconnection networks; Network-on-a-chip; Read-write memory; Space exploration; Technological innovation; CACTI 6.0; cache design; on-chip interconnects;
Journal_Title :
Micro, IEEE
