DocumentCode
1088484
Title
Analysis of the narrow gate effect in submicrometer MOSFET´s
Author
Ji, Chao-Ren ; Sah, Chih-Tang
Author_Institution
Shanghai Science and Technology University, Shanghai, China
Volume
30
Issue
12
fYear
1983
fDate
12/1/1983 12:00:00 AM
Firstpage
1672
Lastpage
1677
Abstract
The narrow gate effect produces an increasing threshold voltage with decreasing gate width. Our previous approximate formulae, based on shifting the gate-edge position, predicts the variation of the threshold voltage with gate width accurately in the super-micrometer width range, but error begins to increase when the gate width is less than a critical value
which is about 1 µm for 200-A gate oxide 7000-A field oxide and
cm-3substrate doping. The physical reason of this error is delineated and combined with two-dimensional numerical analyses to give a new formulae based on shifting the gate-center position as the gate width narrows. The parameters of this new formula may be obtained either from two-dimensional computation or experimental measurements. The error is less than 2 percent at a dc gate bias of 5 V.
which is about 1 µm for 200-A gate oxide 7000-A field oxide and
cm-3substrate doping. The physical reason of this error is delineated and combined with two-dimensional numerical analyses to give a new formulae based on shifting the gate-center position as the gate width narrows. The parameters of this new formula may be obtained either from two-dimensional computation or experimental measurements. The error is less than 2 percent at a dc gate bias of 5 V.Keywords
Chaos; Doping; Helium; Integrated circuit measurements; Integrated circuit modeling; MOSFET circuits; Numerical analysis; Solid state circuits; Threshold voltage; Very large scale integration;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1983.21429
Filename
1483330
Link To Document