Title :
An analytical model for the gate capacitance of small-geometry MOS structures
Author :
Greeneich, Edwin W.
Author_Institution :
Arizona State University, Tempe, AZ
fDate :
12/1/1983 12:00:00 AM
Abstract :
An analytical formulation of the gate capacitance of MOS structures which takes into consideration the effects of electrode thickness and lateral gate dimensions is presented. Results are presented in normalized form covering a wide range of typical device dimensions.
Keywords :
Analytical models; Conductors; Dielectric constant; Electrodes; MOS devices; Parasitic capacitance; Permittivity;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1983.21456
