• DocumentCode
    1088921
  • Title

    Clock-feedthrough compensated switched-capacitor circuits

  • Author

    Ogawa, S. ; Watanabe, K.

  • Author_Institution
    Res. Inst. of Electron., Shizuoka Univ., Hamamatsu, Japan
  • Volume
    27
  • Issue
    22
  • fYear
    1991
  • Firstpage
    2045
  • Lastpage
    2046
  • Abstract
    Novel switched-capacitor circuits are presented which greatly suppress the clock-feedthrough effect. The principle is based on the cancellation of feedthrough charges stored in two capacitors. The circuit is also insensitive to parasitic capacitances and offset voltages of the op amps, and thus allows accurate analogue signal processing. Experimental waveforms are also given to demonstrate its validity.
  • Keywords
    compensation; switched capacitor networks; accurate analogue signal processing; cancellation of feedthrough charges; circuit diagrams; clock feedthrough compensation; insensitive to parasitic capacitances; offset voltage insensitive; switched-capacitor circuits;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19911269
  • Filename
    132982