DocumentCode
1089250
Title
Self-aligned submicron gate digital GaAs integrated circuits
Author
Levy, H.M. ; Lee, R.E.
Author_Institution
Hughes Research Laboratories, Malibu, CA
Volume
4
Issue
4
fYear
1983
fDate
4/1/1983 12:00:00 AM
Firstpage
102
Lastpage
104
Abstract
Digital normally-off (ENFET) GaAs integrated circuits have been fabricated using a novel self-aligned gate process that has produced high speed ring-oscillators with propagation delays as low as 25 ps and other low power circuits with power dissipation as small as 16 µW (at room temperature). The process is unique in that it permits control of parasitic FET source resistance and gate capacitance and also can achieve submicron gate lengths using conventional optical lithography.
Keywords
Digital integrated circuits; FETs; Gallium arsenide; High speed integrated circuits; High speed optical techniques; Optical control; Parasitic capacitance; Power dissipation; Propagation delay; Temperature;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1983.25664
Filename
1483408
Link To Document