DocumentCode
1090089
Title
InP MISFET´s with plasma anodic Al2 O3 and interlayed native Oxide gate insulators
Author
Matsui, M. ; Hirayama, Y. ; Arai, F. ; Sugano, T.
Author_Institution
University of Tokyo, Tokyo, Japan
Volume
4
Issue
9
fYear
1983
fDate
9/1/1983 12:00:00 AM
Firstpage
308
Lastpage
310
Abstract
InP MISFET´s, with native oxide film interlayed between plasma anodic Al2 O3 film and the InP substrate, has been fabricated and showed the instability of the drain current reduced less than ± 4 percent for the period of 5 µs ∼ 5 × 104s. The effective electron mobility is 2100 ∼ 2600 cm2/V.s at room temperature. The CV characteristics of MIS diodes and AES in-depth profiles are also discussed with respect to effects of interlaying native oxide film on device characteristics.
Keywords
Annealing; Diodes; Etching; Hysteresis; Indium phosphide; Insulation; Plasma applications; Plasma temperature; Substrates; Surface treatment;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1983.25744
Filename
1483488
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