DocumentCode :
1090344
Title :
A high-performance CMOS/SOS device with a gradually doped source—Drain extension structure
Author :
Chen, M.L. ; Leung, B.C. ; Lalevic, B.
Author_Institution :
RCA, Somerville, NJ
Volume :
4
Issue :
10
fYear :
1983
fDate :
10/1/1983 12:00:00 AM
Firstpage :
372
Lastpage :
374
Abstract :
A gradually doped source-drain extension (GDDE) CMOS/SOS structure with n+ poly gate has been used to fabricate a high-performance CMOS/SOS inverter ring oscillator and 1%8 static binary counter. The 0.8-µm gate ring oscillator shows 80-ps stage delay at 
V, and it achieves 0.1 pJ of speed-power product with 95-ps stage delay. The plasma-etched epi island minimizes the edge leakage current, as shown in subthreshold characteristics.
V, and it achieves 0.1 pJ of speed-power product with 95-ps stage delay. The plasma-etched epi island minimizes the edge leakage current, as shown in subthreshold characteristics.Keywords :
Etching; Fabrication; Implants; Leakage current; Plasma applications; Plasma devices; Plasma properties; Plasma sources; Plasma temperature; Ring oscillators;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1983.25768
Filename :
1483512
Link To Document :
