DocumentCode :
1090595
Title :
Double implant low dose technique in analog IC fabrication
Author :
Sundaram, Sam L. ; Carlson, Arvid C.
Author_Institution :
Motorola Semicond. Products Sector, Mesa, AZ, USA
Volume :
2
Issue :
4
fYear :
1989
fDate :
11/1/1989 12:00:00 AM
Firstpage :
146
Lastpage :
150
Abstract :
The authors outline the utilization of low-dose implant monitoring (boron, 1011 ions/cm2) in a manufacturing line to control the pinchoff voltage of junction field effect transistors (JFETs) in analog integrated circuits. This technique relies on the fact that the sheet resistance of a doped layer increases significantly when damaged by a relatively low implant dose. The technique is extremely sensitive and is used to adjust the channel dose for achieving an accurate pinchoff voltage and saturation current for JFETs. Finally, yield enhancement is discussed in terms of pinchoff voltage control of JFETs
Keywords :
integrated circuit manufacture; ion implantation; junction gate field effect transistors; linear integrated circuits; monolithic integrated circuits; BiFET IC production; JFETs; analog IC fabrication; doped layer; junction field effect transistors; low-dose implant monitoring; manufacturing line; pinchoff voltage control; saturation current; sheet resistance; yield enhancement; Analog integrated circuits; Boron; Electrical resistance measurement; FET integrated circuits; Fabrication; Implants; Integrated circuit yield; Monitoring; Process control; Voltage control;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/66.44618
Filename :
44618
Link To Document :
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