A JMOS transistor fabricated with 100-Å low-pressure nitrided-oxide gate dielectric

A Junction MOS (JMOS) transistor is proposed to offer increased performance over conventionally scaled NMOS devices as the gate dielectric thickness is reduced. The design, fabrication, and characterization of the JMOS device with a 100-Å gate dielectric is presented. Conventionally scaled NMOS and JMOS devices with gate lengths down to 1 µm are compared. The JMOS devices show a 25- percent increase in channel electron mobility and a 15-percent increase in drain current for equivalent gate drives with minimal adverse short-channel effects.