Title :
Automated gate array scaling
fDate :
2/1/1984 12:00:00 AM
Abstract :
A method for converting integrated circuit personalizations from a technology providing one set of design rules to a technology with a different and smaller set of design rules is presented. An example showing a conversion to a new technology where the cell area was reduced by 59 percent and the speed was increased more than 40 percent is illustrated.
Keywords :
Algorithm design and analysis; Integrated circuit manufacture; Integrated circuit technology; Interpolation; Logic; Resistors; Virtual reality;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1984.21493
