DocumentCode
1091593
Title
FIPOS (Full Isolation by Porous Oxidized Silicon) technology and its application to LSI´s
Author
Imai, Kazuo ; Unno, Hideyuki
Author_Institution
Nippon Telegraph and Telephone Public Corporation, Tokyo, Japan
Volume
31
Issue
3
fYear
1984
fDate
3/1/1984 12:00:00 AM
Firstpage
297
Lastpage
302
Abstract
Processing steps of FIPOS (Full Isolation by Porous Oxidized Silicon) technology and its application to LSI´s are presented, FIPOS technology realizes a silicon-on-insulator structure, utilizing thick porous oxidized silicon and donors produced by proton implantation. New processing steps are proposed which provides small surface step and are suitable for LSI fabrication. Formation conditions of thick porous oxidized silicon are established by density control technique for porous silicon using a newly developed anodization system. CMOS devices are fabricated in isolated silicon layers and it is shown that the characteristics of n-channel and p-channel MOSFETS´s are sufficient for application to CMOS LSI´s. A FIPOS/CMOS logic array with 1.3K gate is successfully fabricated, which shows a higher speed and lower power dissipation than the gates fabricated by bulk CMOS technology. These results indicate that FIPOS technology is very useful for realizing high-performance CMOS LSI´s.
Keywords
CMOS logic circuits; CMOS technology; Control systems; Fabrication; Isolation technology; Large scale integration; Logic arrays; Protons; Silicon on insulator technology; Thickness control;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1984.21518
Filename
1483803
Link To Document