Title :
Short-channel-effect free 0.18 μm MOSFET by temperature-dimension combination scaling theory: design and experiment
Author :
Yokoyama, M. ; Hidaka, T. ; Sasaki, K. ; Masu, K. ; Tsubouchi, K.
Author_Institution :
Res. Inst. of Electr. Commun., Tohoku Univ., Sendai, Japan
fDate :
6/1/1994 12:00:00 AM
Abstract :
We have fabricated 77 K deep-submicron MOSFETs on the basis of the temperature-dimension combination scaling theory (CST). The 77 K MOSFETs with 1-V supply voltage are designed from a 300 K MOSFET with 4-V supply voltage. The fabricated 77 K 0.18 μm device has exhibited fully scaled characteristics. The subthreshold swing (S) and the threshold voltage (V/sub th/) of the 77 K device are found to be 1/4/spl ap/77 K/300 K of those of the 300 K device. Furthermore, S and V/sub th/ are achieved to be 27 mV/dec and 0.21 V without short-channel effect degradation.
Keywords :
MOS integrated circuits; VLSI; cryogenics; insulated gate field effect transistors; 0.18 micron; 1 V; 77 K; deep-submicron MOSFETs; short-channel-effect free device; temperature-dimension combination scaling theory; Degradation; Doping; Electric resistance; MOSFET circuits; Power MOSFET; Power dissipation; Temperature distribution; Threshold voltage; Ultra large scale integration; Wiring;
Journal_Title :
Electron Device Letters, IEEE