Fast Tag Comparator Using Diode Partitioned Domino for 64-bit Microprocessors

Author

Suzuki, Hiroaki ; Kim, Chris H. ; Roy, Kaushik

Volume

54

Issue

2

fYear

2007

Firstpage

322

Lastpage

328

Abstract

As the clock frequency and physical address space of 64-bit microprocessors continue to grow, one major critical path is the access to the on-die cache memory that includes a tag comparator, a tag SRAM and a data SRAM. To improve the delay of the tag comparator, a diode-partitioned (DP) domino circuit is proposed. DP domino reduces the parasitic capacitance and enables a smaller keeper in high fan-in gates. The diode circuit is also improved by an enhanced diode that boosts up the gate voltage of the nMOS diode. Delay of a 40-bit tag comparator using the proposed scheme is 33% faster than an optimized complex domino circuit in 1.8-V 180-nm CMOS technology

Keywords

SRAM chips; cache storage; comparators (circuits); diodes; high-speed integrated circuits; microprocessor chips; 1.8 V; 180 nm; 40 bit; 64 bit; CMOS technology; clock frequency; data SRAM; diode partitioned high-speed domino circuit; fast tag comparator; high-speed cache memory; keeper design; microprocessors; nMOS diode; on-die cache memory; parasitic capacitance; physical address space; tag SRAM; CMOS technology; Cache memory; Circuits; Clocks; Delay; Diodes; Frequency; Microprocessors; Parasitic capacitance; Random access memory; High-speed cache memory; high-speed domino circuit; keeper design; tag comparator;

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2006.885998

Filename

4089131