Title :
DOE/Opt: a system for design of experiments, response surface modeling, and optimization using process and device simulation
Author :
Boning, Duane S. ; Mozumder, P.K.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
fDate :
5/1/1994 12:00:00 AM
Abstract :
Rapid modeling and optimization of manufacturing processes, devices, and circuits are required to support modern integrated circuit technology development and yield improvement. We have prototyped and applied an integrated system, called DOE/Opt, for performing Design of Experiments (DOE), Response Surface Modeling (RSM), and Optimization (Opt). The system to be modeled and optimized can be either physical or simulation based. Within the DOE/Opt system, coupling to external simulation or experimental tools is achieved via an embedded extension language based on Tcl. The external problem then appears to DOE/Opt as a model with user defined inputs and outputs. DOE/Opt is used to generate splits for experiments, to dynamically build and evaluate regression models from experimental runs, and to perform nonlinear constrained optimizations using either regression models or embedded executions. The intermediate regression modeling can appreciably accelerate the optimization task when simulation or physical experiments are expensive. The primary application of DOE/Opt has been to process optimization using coupled process and device simulation. DOE/Opt has also been applied to process and device simulator tuning, and to aid in device characterization. Such a DOE/Opt system is expected to augment the use of TCAD tools and to utilize data collected by CIM systems in support of process synthesis. We have demonstrated the application of the system to process parameter determination, simulator tuning, process control modeling, and statistical process optimization. We are extending the system to more fully support emerging device design and process synthesis methodologies
Keywords :
digital simulation; electronic engineering computing; optimisation; semiconductor device models; semiconductor process modelling; DOE/Opt; TCAD; Tcl-based language; design of experiments; device simulation; embedded extension language; integrated circuit technology; manufacturing processes; nonlinear constrained optimizations; optimization; process control modeling; process parameter determination; process simulation; regression models; response surface modeling; simulator tuning; statistical process optimization; technology CAD; yield improvement; Control system synthesis; Design optimization; Integrated circuit modeling; Integrated circuit technology; Integrated circuit yield; Manufacturing processes; Optimized production technology; Prototypes; Response surface methodology; US Department of Energy;
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on