• DocumentCode
    109281
  • Title

    Past Progress and Future Challenges in LSI Technology: From DRAM and Scaling to Ultra-Low-Power CMOS

  • Author

    Dennard, Robert H.

  • Author_Institution
    T.J. Watson Res. Center, IBM, Yorktown Heights, NY, USA
  • Volume
    7
  • Issue
    2
  • fYear
    2015
  • fDate
    Spring 2015
  • Firstpage
    29
  • Lastpage
    38
  • Abstract
    I think I was very fortunate to get a chance to work in microelectronics in its very early days. Those were very exciting times, particularly the day I found that I could build DRAM with just a single transistor and a capacitor. I wrote an internal paper and obtained a patent, but the first chance I had to work much on my idea came about four years later when the small team I worked with was challenged to make DRAM 25 times denser by reducing the layout dimensions from 5 ?m to 1 ?m. That is when we developed the scaling principles and showed how well they worked by building some experimental MOS transistors scaled to small dimensions. The progress in DRAM and all microelectronic devices and circuits has been amazingly successful since those first scaling principles were introduced. Many challenges have been met to achieve this, but today even more challenges have to be faced if progress is to continue.
  • Keywords
    CMOS integrated circuits; DRAM chips; integrated circuit layout; large scale integration; low-power electronics; DRAM; LSI technology; MOS transistors; capacitor; microelectronic devices; microelectronics; single transistor; size 1 mum; size 5 mum; ultra-low-power CMOS; CMOS integrated circuits; Density measurement; Electric fields; Logic gates; Power system measurements; Threshold voltage; Voltage measurement;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits Magazine, IEEE
  • Publisher
    ieee
  • ISSN
    1943-0582
  • Type

    jour

  • DOI
    10.1109/MSSC.2014.2385965
  • Filename
    7130781