DocumentCode :
1092816
Title :
A model of electrical conduction in polycrystalline silicon
Author :
Josh, Dinesh Prasad ; Srivastava, Ram Sahai
Author_Institution :
D.B.S.(P.G.) College, Dehra Dun, India
Volume :
31
Issue :
7
fYear :
1984
fDate :
7/1/1984 12:00:00 AM
Firstpage :
920
Lastpage :
927
Abstract :
This paper presents a modified version of the conduction model for polycrystalline silicon which includes the thermionic field emission of carriers through the space-charge potential barrier, carrier tunneling through the grain-boundary rectangular potential barrier after being thermally emitted over the space-charge barriers, and the thermionic emission of carriers over these barriers. It is found that if the height of the space-charge potential barrier is much smaller than the height of the grain-boundary barrier, the conduction is mainly controlled by the second mechanism. As grain size decreases, the contribution to current by second mechanism increases. The model predicts that the grain-boundary width in phosphorus-doped polycrystalline silicon film is a strong function of dopant concentration at intermediate dopant concentrations, while the grain-boundary width in boron-doped polycrystalline silicon is independent of dopant concentration in the range of 1016to 5 × 1019cm-3. Considering the potential drop across the grain-boundary barriers, the computed variation of resistivity with dopant concentration for different grain sizes is found to agree with the available experimental data.
Keywords :
Conductive films; Conductivity; Doping; Grain boundaries; Grain size; Predictive models; Semiconductor films; Semiconductor process modeling; Silicon; Thermionic emission;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1984.21631
Filename :
1483916
Link To Document :
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