DocumentCode :
1092869
Title :
A monolithic digital clock-generator for on-chip clocking of custom DSP´s
Author :
Nilsson, Peter ; Torkelson, Mats
Author_Institution :
Dept. of Appl. Electron., Lund Univ., Sweden
Volume :
31
Issue :
5
fYear :
1996
fDate :
5/1/1996 12:00:00 AM
Firstpage :
700
Lastpage :
706
Abstract :
This paper shows a robust and easily implemented clock generator for custom designs. It is a fully digital design suitable for both high-speed clocking and low-voltage applications. This clocking method is digital, and it avoids analog methods like phase locked loops or delay line loops. Instead, the clock generator is based on a ring counter which stops a ring oscillator after the correct number of cycles. Both a 385 MHz clock and a 15 MHz custom DSP application using the on-chip clocking strategy are described. The prototypes have been fabricated in a 0.8 μm standard CMOS process. The major advantages with this clocking method are robustness, small size, low-power consumption, and that it can operate at a very low supply voltage
Keywords :
CMOS digital integrated circuits; digital signal processing chips; timing circuits; 0.8 micron; 15 MHz; 385 MHz; CMOS process; custom DSP; high-speed clocking; low supply voltage; low-power consumption; low-voltage applications; monolithic digital clock-generator; onchip clocking; ring counter; ring oscillator; CMOS process; Clocks; Counting circuits; Delay lines; Digital signal processing; Low voltage; Phase locked loops; Prototypes; Ring oscillators; Robustness;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.509852
Filename :
509852
Link To Document :
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