Title :
A Filtering ΔΣ ADC for LTE and Beyond
Author :
Andersson, Mats ; Anderson, Matthew ; Sundstrom, Lars S. ; Mattisson, Sven ; Andreani, Pietro
Author_Institution :
Dept. of Electr. & Inf. Technol., Lund Univ., Lund, Sweden
Abstract :
This paper presents a filtering ADC for the LTE communication standard, where a second-order Delta-Sigma modulator (DSM) is incorporated into the third-order Chebyshev channel-select filter (CSF) of the radio receiver. The CSF introduces an additional third-order suppression of both thermal and quantization DSM noise, while the CSF transfer function is maintained. A design method for the filtering ADC accounting for unavoidable DSM-DAC delays is developed and experimentally demonstrated. The 65 nm CMOS prototype is clocked at 576/288 MHz with an 18.5/9.0 MHz LTE bandwidth, has an in-band gain of 26 dB, an SNDR of 56.4/58.1 dB, an input-referred noise of 5 nV/ √{Hz}, and an out-of-band (half-duplex) IIP3 of 20/12 dBV rms , with a power consumption of 7.9/5.4 mW and an overall state-of-the art performance.
Keywords :
CMOS integrated circuits; Chebyshev filters; Long Term Evolution; analogue-digital conversion; delta-sigma modulation; radio receivers; transfer functions; CMOS prototype; CSF transfer function; LTE communication standard; channel select filter; delta-sigma analog-digital filter; design method; gain 26 dB; power 5.4 mW; power 7.9 mW; quantization DSM noise suppression; radio receiver; second order delta-sigma modulator; size 65 nm; thermal DSM noise suppression; third order Chebyshev filter; third order suppression; Bandwidth; Delays; Filtering; Gain; Noise; Noise shaping; Receivers; A/D converter; Delta-Sigma modulator (DSM); STF; channel-select filter; continuous-time; filtering A/D converter; low-pass filter;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2014.2319254