Scaling, Offset, and Balancing Techniques in FFT-Based BP Nonbinary LDPC Decoders

Author

Sangmin Kim ; Sobelman, Gerald E.

Author_Institution

Samsung Electron., Suwon, South Korea

Volume

60

Issue

5

fYear

2013

fDate

May-13

Firstpage

277

Lastpage

281

Abstract

An analysis of finite precision effects in nonbinary mixed-domain low-density parity-check decoders is presented. It is shown how improved decoding performance can be achieved by using an offset-based method and proper scaling techniques. In addition, a novel fast Fourier transform (FFT)-based belief propagation (BP) decoder architecture is proposed which balances the computational load between processing units. The results show a 47% reduction in the number of required field-programmable gate array slices compared to a standard FFT-based BP architecture.

Keywords

decoding; fast Fourier transforms; field programmable gate arrays; parity check codes; BP nonbinary LDPC decoders; FFT; balancing technique; belief propagation decoder; decoding performance; fast Fourier transform; field programmable gate array; finite precision effect; nonbinary mixed domain low density parity check decoder; offset technique; scaling technique; Decoding; Galois field (GF); field-programmable gate array (FPGA); low-density parity check (LDPC); quantization;

fLanguage

English

Journal_Title

Circuits and Systems II: Express Briefs, IEEE Transactions on

Publisher

ieee

ISSN

1549-7747

Type

jour

DOI

10.1109/TCSII.2013.2251959

Filename

6488777