Novel device isolation technology with selective epitaxial growth

A novel device isolation technology for small geometry VLSI´s using selective epitaxial growth is described. This isolation structure is composed of an SiO2insulator and an epitaxial silicon selectively grown on a bulk silicon surface surrounded with an SiO2isolation wall using a reduced pressure SiH2Cl2-H2-HCl system. This technology, called SEG (selective epitaxial growth) isolation, offers the potential of both fine and deep isolation with submicrometer size features. Polysilicon gate MOSFET´s are successfully fabricated on the epitaxial silicon layer. The subthreshold slopes for p-channel or n-channel devices are confirmed to be consistent with these for conventional devices. Using SEG isolation technology, less channel width variation and small narrow-channel effect are shown by electrical characteristics for MOSFET´s. The subthreshold behavior for parasitic field devices with submicrometer geometry gives results applicable to fine isolation.