DocumentCode
1094194
Title
Analysis of Power Supply Noise in the Presence of Process Variations
Author
Ghanta, Praveen ; Vrudhula, Sarma
Author_Institution
Arizona State Univ., Tempe
Volume
24
Issue
3
fYear
2007
Firstpage
256
Lastpage
266
Abstract
Characterizing the impact of variability on circuit performance measurements (delay, power, and signal integrity) is necessary to avoid chip failure. The authors present a comprehensive methodology for analyzing the impact of device and metal variations on the power supply noise, and hence the signal integrity, of on-chip power grids.
Keywords
integrated circuit design; power supply circuits; chip failure; circuit performance measurements; on-chip power grids; power supply noise; process variations; signal integrity; variability impact; CMOS technology; Capacitance; Integrated circuit interconnections; Integrated circuit noise; Manufacturing; Noise level; Power grids; Power supplies; Signal design; Threshold voltage; computer-aided design; modeling methodologies; power supply noise; process variations; verification; voltage response;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2007.61
Filename
4288271
Link To Document