DocumentCode :
1094300
Title :
The case for power with test
Author :
Mak, T.M.
Author_Institution :
Intel
Volume :
24
Issue :
3
fYear :
2007
Firstpage :
296
Lastpage :
296
Abstract :
In the past few years, many researchers have claimed that power issues in test applications are primarily due to scan shifting. The author of this column explains why this conclusion is simply not realistic.
Keywords :
Automatic test pattern generation; Circuit testing; Clocks; Delay; Energy consumption; Energy management; Frequency; Logic; Power grids; Sequential analysis; functional and scan shift speed; power; scan shifting; static and dynamic power; test;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2007.87
Filename :
4288283
Link To Document :
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