DocumentCode :
1094326
Title :
VTinstabilities of scaled MOSFET´s with the top passivation structure composed of Silicon Nitride and silicate glass films
Author :
Noyori, Masaharu ; Nakata, Yoshiro
Author_Institution :
Matsushita Electric Industrial Company, Ltd, Osaka, Japan
Volume :
31
Issue :
12
fYear :
1984
fDate :
12/1/1984 12:00:00 AM
Firstpage :
1687
Lastpage :
1692
Abstract :
This paper describes the threshold-voltage instability mechanism on scaled p-channel MOSFET´s with the double-layer top passivation structure composed of plasma silicon nitride and undoped silicate glass films under negative gate bias stress at high temperatures. From the results of this study, it was found that there are two kinds of instability mechanism, which have different activation energies. One mechanism, which is observed at below 200°C and is independent of the gate length, is due to the slow trapping. The other, which is observed at above 225°C is dependent on the gate length, is due to the secondary slow trapping. It is explained by the impurity diffusion followed by a reaction phenomenon.
Keywords :
CMOS technology; Glass; Impurities; Passivation; Plasma temperature; Semiconductor films; Silicon; Stress; Substrates; Testing;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1984.21772
Filename :
1484057
Link To Document :
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