DocumentCode :
1094390
Title :
Hardware accelerators-meeting the RISC challenge
Author :
Edwards, D.A.
Author_Institution :
Dept. of Computer Sci., Manchester Univ., UK
Volume :
6
Issue :
3
fYear :
1989
fDate :
6/1/1989 12:00:00 AM
Firstpage :
104
Lastpage :
106
Abstract :
Today´s workstations offer a significant performance acceleration compared with yesterday´s general purpose computers, raising the question of whether there is a role for specialised hardware accelerators. The paper discusses this issue in the context of an engine developed by the Computer Science Department at Manchester University, for routing multilayer printed circuit boards. The accelerator has formed an essential part of the department´s CAD facility for several years and a second generation machine has just been commissioned
Keywords :
circuit layout CAD; printed circuits; reduced instruction set computing; CAD; RISC; hardware accelerators; performance acceleration; routing multilayer printed circuit boards;
fLanguage :
English
Journal_Title :
Computer-Aided Engineering Journal
Publisher :
iet
ISSN :
0263-9327
Type :
jour
Filename :
42891
Link To Document :
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