Title :
Hardware accelerators-meeting the RISC challenge
Author_Institution :
Dept. of Computer Sci., Manchester Univ., UK
fDate :
6/1/1989 12:00:00 AM
Abstract :
Today´s workstations offer a significant performance acceleration compared with yesterday´s general purpose computers, raising the question of whether there is a role for specialised hardware accelerators. The paper discusses this issue in the context of an engine developed by the Computer Science Department at Manchester University, for routing multilayer printed circuit boards. The accelerator has formed an essential part of the department´s CAD facility for several years and a second generation machine has just been commissioned
Keywords :
circuit layout CAD; printed circuits; reduced instruction set computing; CAD; RISC; hardware accelerators; performance acceleration; routing multilayer printed circuit boards;
Journal_Title :
Computer-Aided Engineering Journal