Monitoring Transistor Degradation in Power Inverters Through Pole Shifts

In a power inverter configuration with pull-up and pull-down transistors, ringing that occurs on the high-to-low and low-to-high transitions can be used to track aging or degradation of the transistors and potentially predict failures. Changes in a transistor´s equivalent resistance and capacitance can affect the frequency and damping factor of the characteristic ringing detected on the inverter´s output. In this paper, the matrix pencil method is used to locate the poles associated with this ringing, and detect shifts in position that indicate transistor degradation.