DocumentCode :
1096414
Title :
A short-channel CMOS/SOS technology in recrystallized 0.3-µm-thick silicon-on-sapphire films
Author :
Mayer, D.C. ; Vasudev, P.K. ; Lee, J.Y. ; Allen, Y.K. ; Henderson, R.C.
Author_Institution :
Hughes Research Laboratories, Malibu, CA
Volume :
5
Issue :
5
fYear :
1984
fDate :
5/1/1984 12:00:00 AM
Firstpage :
156
Lastpage :
158
Abstract :
CMOS/SOS devices and circuits were fabricated in 0.3-µm-thick epitaxial silicon-on-sapphire (SOS) films. Two solid-phase epitaxial recrystallization techniques double solid-phase epitaxy (DSPE) and solid-phase epitaxy and regrowth (SPEAR) reduced the total microtwin concentrations in the Si layers more than tenfold, while increasing electron and hole inversion-layer mobilities between 30 and 45 percent. Leakage currents were substantially reduced in all SPEAR devices and in n-channel DSPE transistors, with some increase observed for p-channel DSPE devices. Drive currents and subthreshold slopes also showed significant improvement in both n- and p-devices. Propagation delays below 75 ps were obtained for CMOS/SOS inverters with Loff= 0.5 µm. The application of DSPE and SPEAR techniques to 0.3-µm SOS films will extend the scaling of CMOS/SOS to circuits with VLSI complexity.
Keywords :
CMOS technology; Charge carrier processes; Circuits; Electron mobility; Epitaxial growth; Inverters; Leakage current; Propagation delay; Semiconductor films; Very large scale integration;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1984.25868
Filename :
1484244
Link To Document :
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