The impact of oxidation of channel polysilicon on the trap-density of submicron bottom-gate TFT´s

Oxidation of channel polysilicon improves characteristics of narrow channel TFT´s, especially in leakage current. Small leakage current of less than /spl minus/20 fA/μm and high on/off ratio of about 7 orders of magnitude at a drain voltage of /spl minus/3.3 V have been achieved by this method. By the analysis of trap densities, leakage current reduction in the oxidized TFT is attributed to the oxidation encroachment under the channel polysilicon which results in a decrease of interface-state density from 5×10/sup 11//cm² to about 10/sup 10//cm² at both gate side and back side of the channel polysilicon. It is pointed out that interface state is in some cases more responsible for device degradation than bulk traps and that the reduction of interface states is indispensable to improving device characteristics. This method is directly applicable to TFT load SRAM´s in which TFT width is less than 0.5 μm.