Title :
Silicon Oxide enhanced Schottky gate In0.53Ga0.47As FET´s with a self-aligned recessed gate structure
Author :
Cheng, C.L. ; Liao, A.S.H. ; Chang, T.Y. ; Caridi, E.A. ; Coldren, L.A. ; Lalevic, B.
Author_Institution :
AT&T Bell Laboratories, Homdel, NJ
fDate :
12/1/1984 12:00:00 AM
Abstract :
We present the fabrication and characterization of an In0.53Ga0.47As enhanced Schottky gate FET with a self-aligned recessed gate structure. A thin layer of e-beam evaporated silicon oxide was used to reduce the gate leakage current. For a n-channel doping of 8 × 1016cm-3and a gate length of 1.5 µm, these devices showed good pinchoff characteristics with transconductances of 150 mS/mm. The effective velocity of electrons at current saturation is deduced to be 2.4 × 107cm/s at the drain end of the gate. At 3 GHz these devices have a maximum available gain of 10 dB, decreasing to 6 dB at 6 GHz.
Keywords :
Electrical resistance measurement; Electron devices; Graphics; Hysteresis; Indium gallium arsenide; Leakage current; Schottky gate field effect transistors; Silicon; Threshold voltage; Transconductance;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/EDL.1984.26008