DocumentCode
1097929
Title
A methodology for debugging ASIC prototypes in the field
Author
Fechser, David A.
Author_Institution
VLSI Technol. Inc., Tempe, AZ, USA
Volume
8
Issue
4
fYear
1991
Firstpage
18
Lastpage
23
Abstract
A step-by-step methodology for debugging and solving wafer sort and final-test prototype failures in application-specific integrated circuits (ASICs) is provided. The uses of schmoo plots, datalogs, and fault analysis are described, and a checklist for investigating problems is given. Most of the work can take place at the remote site, using simulators, schematics, and standard information provided by the test engineer.<>
Keywords
application specific integrated circuits; automatic testing; computer debugging; fault tolerant computing; integrated circuit testing; application-specific integrated circuits; datalogs; debugging ASIC prototypes; fault analysis; final-test prototype failures; methodology; schematics; schmoo plots; simulators; wafer sort; Application specific integrated circuits; Assembly; Costs; Data engineering; Debugging; Delay; Design engineering; Integrated circuit testing; Packaging; Prototypes;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/54.107202
Filename
107202
Link To Document