DocumentCode :
1098398
Title :
Economic effects in design and test
Author :
Dear, I.D. ; Dislis, C. ; Ambler, A.P. ; Dick, J.
Author_Institution :
Brunel Univ., Uxbridge, UK
Volume :
8
Issue :
4
fYear :
1991
Firstpage :
64
Lastpage :
77
Abstract :
The authors argue that because of misconceptions and myths about the cost of test, many devices and systems are inadequately tested. Focusing on application-specific integrated circuits (ASICs), the authors discuss the economics of test and show how economic analysis leads to test that pays back. The EVEREST test strategy planner, a design tool that aids in the selection of design-for-testability structures during ASIC design and uses cost as a primary selection parameter, is presented.<>
Keywords :
application specific integrated circuits; automatic testing; economics; electrical engineering computing; integrated circuit testing; application-specific integrated circuits; design; design tool; design-for-testability; economic effects; test; Books; Central Processing Unit; Circuit faults; Circuit testing; Costs; Degradation; Electronic circuits; Electronic equipment testing; Integrated circuit testing; System testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/54.107206
Filename :
107206
Link To Document :
بازگشت