An optimized and reliable LDD structure for 1-µm NMOSFET based on substrate current analysis

Optimization of the n^-region concentration for n-channel MOSFET´s with a lightly doped drain (LDD) structure was investigated, based on an analysis of the substrate current characteristics. When a substrate current tailing is observed, which is peculiar to the LDDFET with a low-concentration n^-region, a gate current is not observed, which suggests strong resistance against hot-carrier injection. This was confirmed by a bias stress test. The optimized surface concentration for the n^-region ranges from 1 × 10¹⁸cm^-3to 2.5 × 10¹⁸cm^-3under negligible VTHshift and less than 25-percent driving capability degradation, compared to values for a conventional MOSFET.