DocumentCode
1099073
Title
Application of RADSAFE to Model the Single Event Upset Response of a 0.25 μm CMOS SRAM
Author
Warren, Kevin M. ; Weller, Robert A. ; Sierawski, Brian D. ; Reed, Robert A. ; Mendenhall, Marcus H. ; Schrimpf, Ronald D. ; Massengill, Lloyd W. ; Porter, Mark E. ; Wilkinson, Jeffrey D. ; LaBel, Kenneth A. ; Adams, James H.
Author_Institution
Inst. for Space & Defense Electron., Nashville
Volume
54
Issue
4
fYear
2007
Firstpage
898
Lastpage
903
Abstract
The RADSAFE simulation framework is described and applied to model SEU in a 0.25 mum CMOS 4 Mbit SRAM. For this circuit, the RADSAFE approach produces trends similar to those expected from classical rectangular parallelepiped models, but more closely represents the physical mechanisms responsible for SEU in the SRAM circuit.
Keywords
CMOS memory circuits; SRAM chips; integrated circuit modelling; ion beam effects; semiconductor process modelling; 0.25 mum CMOS 4 Mbit SRAM; RADSAFE simulation framework; SEU model; heavy ion beam effects; size 0.25 mum; storage capacity 4 Mbit; Circuit simulation; Computational modeling; Microelectronics; Monte Carlo methods; NASA; Physics; Random access memory; Semiconductor device modeling; Single event upset; Space technology; GEANT4; RADSAFE; SEU; TCAD; heavy-ion;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2006.889810
Filename
4291801
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