Hot-carrier effects on gate-induced-drain-leakage (GIDL) current in thin-film SOI/NMOSFET´s

Author

Zhang, Binglong ; Balasinski, Artur ; Ma, T.P.

Author_Institution

Dept. of Electr. Eng., Yale Univ., New Haven, CT, USA

Volume

15

Issue

5

fYear

1994

fDate

5/1/1994 12:00:00 AM

Firstpage

169

Lastpage

171

Abstract

The gate-induced-drain-leakage (GIDL) currents in thin-film SOI/NMOSFET´s have been studied before and after front-channel hot-carrier stress. Both the normal-mode stress (with the front gate biased beyond the threshold voltage and the drain biased at a high positive voltage, while the source is grounded with the back gate) and the reverse-mode stress (with the source and drain interchanged) have been investigated. The following significant changes have been observed: i) an increase of the off-state drain GIDL current after the normal-mode stress, especially in the low gate field region, and ii) a decrease of the off-state GIDL current after the reverse-mode stress, especially in the high gate field region. These changes can be attributed to the hot-carrier induced interface traps and their effects on the parasitic bipolar transistor gain in the thin-film SOI/NMOSFET.<>

Keywords

electron traps; elemental semiconductors; hole traps; hot carriers; insulated gate field effect transistors; interface electron states; leakage currents; semiconductor-insulator boundaries; silicon; thin film transistors; Si-SiO/sub 2/; front-channel hot-carrier stress; gate-induced drain leakage current; hot-carrier induced interface traps; low gate field region; n-channel MOSFET; normal-mode stress; parasitic bipolar transistor gain; reverse-mode stress; thin-film SOI NMOSFET; Bipolar transistors; Hot carrier effects; Hot carriers; MOSFET circuits; Microelectronics; Semiconductor films; Stress; Thin film transistors; Threshold voltage;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.291597

Filename

291597