Title :
Clock-feedthrough compensated sample/hold circuits
Author :
Watanabe, K. ; Ogawa, Shinichi
Author_Institution :
Res. Inst. of Electron., Shizuoka Univ., Hamamatsu
fDate :
9/15/1988 12:00:00 AM
Abstract :
A novel circuit technique is presented to eliminate the clock feedthrough effect in a sample/hold circuit. The device requirement is minimal, and thus it is quite useful for CMOS monolithic implementation of precise sampled analogue signal processing circuits. Experimental waveforms are also given to demonstrate its validity
Keywords :
CMOS integrated circuits; clocks; compensation; sample and hold circuits; CMOS monolithic implementation; clock feedthrough compensation; sample/hold circuits; sampled analogue signal processing circuits;
Journal_Title :
Electronics Letters
