DocumentCode
1099866
Title
Clock-feedthrough compensated sample/hold circuits
Author
Watanabe, K. ; Ogawa, Shinichi
Author_Institution
Res. Inst. of Electron., Shizuoka Univ., Hamamatsu
Volume
24
Issue
19
fYear
1988
fDate
9/15/1988 12:00:00 AM
Firstpage
1226
Lastpage
1228
Abstract
A novel circuit technique is presented to eliminate the clock feedthrough effect in a sample/hold circuit. The device requirement is minimal, and thus it is quite useful for CMOS monolithic implementation of precise sampled analogue signal processing circuits. Experimental waveforms are also given to demonstrate its validity
Keywords
CMOS integrated circuits; clocks; compensation; sample and hold circuits; CMOS monolithic implementation; clock feedthrough compensation; sample/hold circuits; sampled analogue signal processing circuits;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
Filename
29175
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