• DocumentCode
    1100252
  • Title

    A multiplexer employing Josephson functional gates

  • Author

    Akahori, Yuji ; Ichimiya, Yoshichika

  • Author_Institution
    Nippon Telegraph and Telephone Public Corporation, Atsugi-shi, Kanagawa-ken, Japan
  • Volume
    32
  • Issue
    6
  • fYear
    1985
  • fDate
    6/1/1985 12:00:00 AM
  • Firstpage
    1053
  • Lastpage
    1056
  • Abstract
    A new Josephson multiplexer is designed and analyzed. Experimentally, the multiplexer is fabricated by standard Pb alloy technology with 5-µm line width, and its operation is successfully performed. The typical operating margin is ±16 percent for the gate current. The multiplexer is a four-way multiplexer with a 2-4 decoder consisting of functional AND gates. The functional gates are composed of two asymmetric logics arranged in a series on its gate current line. These gates realize 2-4 decoder and data selector functions. The multiplexer offers advantages of integrated-circuit area reduction, low power dissipation, and high-speed operation.
  • Keywords
    Decoding; Josephson junctions; Latches; Logic circuits; Logic gates; Multiplexing; Power dissipation; Power transmission lines; Signal processing; Switches;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1985.22073
  • Filename
    1484819